1. Field of the Invention
The invention relates to a multifunctional integrated circuit for controlling the addition and subtraction functions of a high speed parallel digital adder.
2. Description of the Prior Art
A typical high speed parallel digital adder may include logic which will perfrom several functions which are necessary for operation or will improve the adders performance. First, the adder may include look ahead logic which generates carry or borrow information in parallel for all orders of bits added or subtracted. Secondly, the adder will have select logic which will provide control signals to the arithmetic logic units of its adder to select the add or subtract function. The adder may also contain error logic to ensure the results of the arithmetic logic unit computation. These operations and their associated logic equations are all known in the art. However, up to the present time each of these functions have been performed using one or more integrated circuits. These circuits all have some common logic and inputs. This commonality has not been used to simplify the circuits. This has resulted in more complex, expensive logic with less than optimal processing time in the arithmetic logic units.